Preface: About This Guide
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This guide describes the RocketIO? GTP transceivers available in the Virtex-5 LXT
and SXT platform devices.
Virtex-5 FPGA Tri-Mode Ethernet Media Access Controller User Guide
This user guide describes the dedicated Tri-Mode Ethernet Media Access Controller
available in the Virtex-5 LXT and SXT platform devices.
Virtex-5 FPGA Integrated Endpoint Block User Guide for PCI Express? Designs
This user guide describes the integrated Endpoint blocks in the Virtex-5 LXT and SXT
platform devices for PCI Express designs.
XtremeDSP Design Considerations
This guide describes the XtremeDSP. slice and includes reference designs for using the
DSP48E.
Virtex-5 FPGA Configuration User Guide
This all-encompassing configuration guide includes chapters on configuration
interfaces (serial and SelectMAP), bitstream encryption, Boundary-Scan and JTAG
configuration, reconfiguration techniques, and readback through the SelectMAP and
JTAG interfaces.
Virtex-5 FPGA System Monitor User Guide
The System Monitor functionality available in all the Virtex-5 devices is outlined in
this guide.
Virtex-5 FPGA Packaging and Pinout Specification
This specification includes the tables for device/package combinations and maximum
I/Os, pin definitions, pinout tables, pinout diagrams, mechanical drawings, and
thermal specifications.
Additional Support Resources
To search the database of silicon and software questions and answers, or to create a
technical support case in WebCase, see the Xilinx? website at:
Typographical Conventions
This document uses the following typographical conventions. An example illustrates each
convention.
6
Convention
Italic font
Underlined Text
Meaning or Use
References to other documents
Emphasis in text
Indicates a link to a web page.
Example
See the Virtex-5 Configuration
Guide for more information.
The address (F) is asserted after
clock event 2.
ML501 Evaluation Platform
UG226 (v1.4) August 24, 2009
相关PDF资料
HW-V5-ML507-UNI-G EVAL PLATFORM V5 FXT
HW-V5-ML550-UNI-G EVALUATION PLATFORM VIRTEX-5
HW-V5-ML555-G BOARD EVAL FOR VIRTEX-5 ML555
HW-V5-ML561-UNI-G EVALUATION PLATFORM VIRTEX-5
I-JET JTAG ARM DEBUGGING PROBE
IAC24A INPUT MODULE AC 5MA 24VDC
IAC5EQ INPUT MODULE AC 10MA 5VDC
IB8RM SURGE SUPP 8OUT 12'CORD W/REMOTE
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